Academic year 2015-16

Digital Logic and Computers

Degree: Code: Type:
Bachelor's Degree in Computer Science 21407 Compulsory subject, 1st year
Bachelor's Degree in Telematics Engineering 21298 Compulsory subject, 1st year
Bachelor's Degree in Audiovisual Systems Engineering 21596 Compulsory subject, 1st year

 

ECTS credits: 6 Workload: 150 hours Trimester: 2nd and 3rd

 

Department: Dept. of Information and Communication Technologies
Coordinator: Enric Peig
Teaching staff:
Language:
Timetable:
Building: Communication campus - Poblenou

 

Introduction

Digital Logic and Computers aims to show the principles of the technologies used in the development of computer architectures. The main objective of the course is that students acquire a good level of understanding of the functioning of computers at the hardware level.

The first part of the course presents the principles of operation of digital systems in general. Binary systems of representation of information, the principles of Boolean algebra and techniques of analysis and design of combinational logic systems are studied.

In the second part, the sequential logic systems and their basic elements are presented, and a methodology is proposed to analyze and synthesize them. Then, the architectural model of Von Neumann is explained, the basis of most of computer systems. This model divides a computer into three subsystems: processor, memory and input / output. In this course the student is introduced to the operation of the processor, through the study of a single processor. It is left to the course of Computer Architecture the study of a real processor and memory subsystems and input / output.

The subject has a considerable burden of new concepts for first-year students, but they will be acquired gradually through exercises and practice in the laboratory, so that the memorization required is minimal. Therefore, you can say that you should pay as much or more attention to the procedures as to new concepts.

 

Prerequisites

Being a first-year course, no prior knowledge is required beyond those acquired in high school.

 

Associated competences

Cross-disciplinary competencesSpecific competences

 Instrumental

1. Capacity for analysis and synthesis

2. Troubleshooting

3. Logical reasoning

4. Organization of time and
planning

Systemic

5. Ability to apply theoretical knowledge into practice

 

1. Knowledge of the basic principles of
digital electronics

2. Knowledge of the binary numbering system, and how it is used to represent natural, integer and real numbers.

3. Addition and subtraction and overflow detection with binary numbers

4. Knowledge of Boolean algebra and
its application to the design of software systems

5. Simplification of logic functions
with Veitch - Karnaugh maps

6. Design of combinational logic systems

7. Using combinational functional blocks
to design more complex systems

8. Knowledge of bistable devices

9. Design of sequential logic systems

10. Use of sequential functional blocks for designing more complex systems

11. Knowledge of the Von Neumann model for computers and main features of its elements

12. Understanding the operation of a
single processor

13. Writing simple programs in assembly language

14. Making small changes to
single processor architecture

15. Understanding the passage of high to low
level and related tools like the memory map
and the symbol table

16. Using a simulator to see the
processor operation

 

Assessment

General evaluation criteria

To pass the course the studenst must demonstrate that they have reached a sufficient level in the 5 general skills and the 16 specific skills outlined in paragraph 4 of this syllabus.

This achievement can be demonstrated in the 7 labs to be completed during the course, and in the 2 written tests to be taken at the end of the first and second quarter of the subject.

Labs:

The labs will be reviewed and scored by teachers during the lab sessions, and the grade will only be equal to or greater than 5 if the have been completed correctly. Labs are held in groups of 3 students. Each practice will include a preliminary study to be delivered at the beginning of the session mandatory to be able to participate in the laboratory session.

In the event that a group has been unable to deliver some of the lab deliverables, the evaluation will be conducted in a personal interview with the lab teacher to be set up in hours of tutoring before the examination period of the corresponding quarter. To be eligible for the interview some of the labs shall have been completed. Interviews will not be admitted to make up for all the labs.

In order to pass the course a minimum grade of 5 in each of the two labs must be obtained. The labs cannot be passed in July.

Written tests:

At the end of each of the two quarters there will be a partial written exam, with exercises related to the skills covered during the quarter. For a 5 on the tests, sudents must demonstrate the minimum achievement of each competence covered.

In order to pass the course a minimum grade of 5 in in each of the two partial exams. The two partial exams can be also taken in July.

Written deliverables:

In the seminar sessions  a series of exercises will be proposed and will collected that, like labs, have the status of ongoing evaluation. The main objective is that students can be aware of their level of achievement of competencies.

These exercises are optional (not required to pass the course) and are not recoverable. They only make sense at the time they are collected, during the seminar session.

Final grade:

The final grade for the course will be the sum of 60% of the average of the two partial exam grades, 30% of the average of the lab grades, and 10% of the grade of the seminar exercises.

In any case no grade from one year to another is kept.

 Evaluation elementWeightCan be made up
Written tests

 1st quarter partial exam

2nd quarter partial exam

A minimum grade of 5 is required in each of the exams

 60%

 Can be made up in July

Execution tests

Labs

A minimu grade of 5 is required in each of the 7 labs 

30% 

Cannot be made up 

Execution validation tests

Exceptionally, one can make up some of the 7 labs with an interview

 

 There will be a single interview opportunity

Written deliverables

 Exercises collected during the seminar sessions

 10%

Cannot be made up 



 

Contents

Content blocks

1. Binary representation of information

2. Boolean algebra and logic gates

3. Analysis and synthesis of combinational logic systems

4. Analysis and synthesis of sequential logic systems

5. The model of Von Neumann computers

6. The processor subsystem

 

Organization and specifics of contents

Content Block 1. -Binary representation of information

ConceptsProceduresAttitudes

1. Systems of binary and hexadecimal numbering

2. Pure binary system and arbitrary codes

3. Complement representation for integers

4. Representation of real numbers

1. Change of base between base 10, 2 and 16

2. Basic arithmetic operations in binary, in different representation formats

3. Construction of arbitrary binary codes

 

Content Block 2. Boolean algebra and logic gates

ConceptsProceduresAttitudes

1. Truth Tables

2. Logic Gates

3. Postulates and theorems of Boolean algebra

4. Normal forms of a Boolean function

1. Simplification of Boolean functions with algebraic methods

2. Implementation of Boolean functions with logic gates

 

Content Block 3. Analysis and synthesis of combinational logic systems

ConceptsProceduresAttitudes

1. Veitch-Karnaugh diagrams

2. Functional blocks: encoders,
decoders, multiplexers, demultiplexers

3. Arithmetic blocks: adders, comparators

1. Minimization of logic functions with VK diagrams

2. Analysis of the behavior of combinational systems

3. Design of simple combinational systems

1. Clarity and neatness in labs

Content Block 4. Analysis and synthesis of sequential logic systems

ConceptsProceduresAttitudes

1. RS, JK, D and T latches. Behavior and excitation tables

2. Sync by level and flank

3. Functional blocks: registers and counters

4. State diagrams to model the behavior of sequential systems

1. Analysis of the behavior of sequential systems: chronograms

2. Design of simple sequential systems

3. Moore and Mealy methodologies for sequential systems

 

 

Content Block 5. The model of Von Neumann computers

ConceptsProceduresAttitudes

1. The Von Neumann model

2. Processor subsystems , memory, input / output

3. Hierarchical structure of computers: the main levels

 

 

Content Block 6. The processor subsystem

ConceptsProceduresAttitudes

1. Processing unit and control unit

 

2. Assembly language

 

3. Tools for the implementation of programs in machine language

 

1. Writing simple programs in assembly language

2. Passing high-level code to low level

3. Analysis of the performance of a processor

4. Small changes in the architecture of a processor

1. Clarity and neatness in labs

 

Methodology

Learning Objectives

This course is intended for students to be able to analyze the functioning of combinational and sequential logic systems and to design simple systems, whether formally or following more intuitive creative methods and procedures. This should enable students to understand the bases of operation of computers, and how they are able to execute the code provided to them through the programs.

To carry out these processes of analysis and design of software systems, it is essential to master the methods of binary representation of the numbers and the principles of Boolean algebra, which is what allows to mathematically model the operation of the logical systems.

Another major objective is to know the operating principles of computers and how they are able to execute the code provided to them through the programs. This means on the one hand increasing the knowledge about logical systems introduced in the first half, with sequential systems, and secondly to present the architectural model followed by computers, which allows to dissect the tasks performed by the computer to function blocks.

This working knowledge of computers is achieved both from the analysis as from synthesis points of view. If students are able to design new circuits or modifying those analyzed the result is much more satisfying.

Methodological approach to the subject

In the theory sessions, all in large groups, the basic theoretical concepts are introduced and the proper procedures for solving problems will be shown. In the seminar sessions the problems on which students have worked previously will be discussed, and questions that may arise will be resolved. In laboratory sessions exercises will be held with software that allows the design of logic circuits and to test them. The objective is twofold: firstly to understand and consolidate the theoretical concepts and secondly to serve as indicators for evaluating the achievement of the skills related to the design of software systems.

Temporal organization: sessions, learning activities and estimated time of dedication

Classroom sessions are organized as follows:

Content blockLarge groupsLaboratorySeminars
Introduction

T1

 

 

1. Binary representation of information

T1

 

S1

2. Boolean algebra and logic gates T2   S1
3. Analysis and synthesis of combinational logic systems T3 T4 T5 T6 T7 P1 P2 P3 S2 S3
4. Analysis and synthesis of sequential logic systems T8 T9 T10 P4 P5 S4
5. The Von Neumann model of computers T10    
6. The processor subsystem  T11 T12 T13 P6 P7 S5 S6

The deliverables are planned at the seventh laboratory session and sixth session of the seminar.

The work outside the classroom will consist basically in solving proposed problems and preparing labs and preliminary studies.

 In-class activityOut-of-class activityAssessment activity
TopicFull groupMedium groupSmall group  

Introduction

1

       

 1. Binary representation of information

1

 

 

 2. Boolean algebra and logic gates

 

 

3. Analysis and synthesis of combinational logic systems

 

       

Veitch-Karnaugh diagrams

4 2 2 10  

Functional blocks

5 4 2 20  

4. Analysis and synthesis of sequential logic systems

5 4 2 22  

5. The Von Neumann model of computers

1     1  

6. The processor subsystem

7 4 4 31  

Evaluation

      4 4

Total:

 26

 14

12 

94 

Total: 150

 

Resources

Learning resources. Basic textbooks (hardcopy and electronic) 

 ANGULO USATEGUI, José María: Sistemas digitales y tecnología de computadoras. Ed. Thompson, 2002 
 LLORIS, A.; PRIETO, A.: Diseño lógico. Ed. McGraw-Hill, 1996. 
 HERMIDA, R.: Fundamentos de computadoras. Madrid: Síntesis, 1998. 

Learning resources. Additional bibliography (hardcopy and electronic) 

 Gajski, D. D.: Principios de diseño digital. Ed. Prentice-Hall, 1997. 

Learning resources. Course materials 

• Exercise collection 
 Notes for the exam